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HMF51232M4S
FLASH-ROM MODULE 2MByte (512K x 32-Bit) Part No. HMF51232M4S GENERAL DESCRIPTION
The HMF51232M4S is a high-speed flash read only memory (FROM) module containing 524,288 words organized in a x32bit configuration. The module consists of four 512Kx 8 FROM mounted on a 72-pin, single-sided, FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Four chip enable inputs, (/CE_UU1, /CE_UM1, /CE_LM1, /CE_LL1) are used to enable the module's 4 bytes independently. Output enable (/OE) and write enable (/WE) can set the memory input and output. When FROM module is disable condition, the module is becoming power standby mode, system designer can get low-power design. All module components may be powered from a single +5V DC power supply and all inputs and outputs are TTL-compatible.
FEATURES
w Access time : 55,70, 90 and 120ns w High-density 2MByte design w High-reliability, low-power design w Single + 5V 0.5V power supply w Easy memory expansion wAll inputs and outputs are TTL- compatible w FR4-PCB design w Low profile 72-pin SIMM w Minimum 1,000,000 write/erase cycle w Sector erases architecture w Sector group protection w Temporary sector group unprotection w Part Identification HMF51232M4S: Gold Plate Lead PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SYMBOL Vss A3 A2 A1 A0 Vcc A11 /OE A10 Vcc NC /CE_LL1 DQ7 DQ0 DQ1 DQ2 DQ6 DQ5 DQ4 DQ3 /WE A17 A14 A13
PIN ASSIGNMENT
PIN 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 SYMBOL Vcc DQ8 DQ9 DQ10 NC Vcc /CE_LM1 DQ15 DQ14 DQ13 DQ12 DQ11 A18 A16 Vss A6 Vcc A5 A4 Vcc NC /CE_UM1 DQ23 DQ16 72-PIN SIMM TOP VIEW PIN 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 SYMBOL DQ17 DQ18 DQ22 DQ21 DQ20 DQ19 Vcc A15 A12 A7 Vcc A8 A9 DQ24 DQ25 DQ26 NC /CE_UU1 DQ31 DQ30 DQ29 DQ28 DQ27 Vss
OPTIONS
w Timing 55ns access 70ns access 90ns access 120ns access w Package 72-pin SIMM
MARKING
- 55 - 70 - 90 - 120
16 17 18 19 20 21 22 23
M
24
FUNCTIONAL BLOCK DIAGRAM
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HMF51232M4S
32 DQ0 - DQ31 19 A0 - A18 A0-18 DQ 0-7
/WE
/OE
U5
/CE
/CE_LL1 A0-18 DQ 8-15 /WE /OE
U6
/CE
/CE_LM1 A0-18 DQ16-23 /WE /OE
U7
/CE
/CE_UM1 A0-18 DQ24-31 /WE /OE /WE
/OE
/CE
U8
/CE_UU1
TRUTH TABLE
MODE STANDBY NOT SELECTED READ WRITE Note : X means don't care /OE X H L X /CE H L L L /WE X H H L DQ HIGH-Z HIGH-Z Dout Din POWER STANDBY ACTIVE ACTIVE ACTIVE
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ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc Power Dissipation Storage Temperature SYMBOL VIN,OUT VCC Po TSTG
HMF51232M4S
RATING -2.0V to +7.0V -2.0V to +7.0V 4W -65oC to +125oC
Operating Temperature TA -55oC to +125oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for 5% device Supply Voltages Vcc for 10% device Supply Voltages Ground SYMBOL VCC Vcc VSS MIN 4.75V 4.5V 0 0 TYP. MAX 5.25V 5.5V 0
DC AND OPERATING CHARACTERISTICS (0oC TA 70 oC ; Vcc = 5V 0.5V )
PARAMETER Input Load Current A9 Input Lodad Current Output Leakage Current Vcc Active Read Current(Note1,2) Vcc Active Write(Program/Erase) /CE = VIL, /OE=VIH Current(Note 2,3,4) Vcc Standby Current(Note2) Input Low Level Input High Level /CE= VIH ICC3 VIL VIH -0.5 2.0 4 20 0.8 Vcc+0. 5 Voltage for Autoselect And Sector Protect Output Low Voltage Output High Voltage Low Vcc Lock-Out Voltage Notes: 1. The Icc current listed is typically less than 2mA/MHz, with /OE at VIH. 2. Icc active while embedded algorithm (program or erase) is in progress IOL = 12mA, Vcc =Vcc Min IOH = -2.5mA, Vcc = Vcc Min VOL VOH VLKO 2.4 3.2 4.2 Vcc= 5.25V VID 10. 5 0.45 V V V 12.5 V mA V V ICC2 120 160 mA TEST CONDITIONS Vin=Vss to, VCC, Vcc= Vcc Max Vcc= Vcc Max, A9= 12.5V VOUT= VSS to VCC, VCC= VCC Max /CE = VIL, /OE=VIH, SYMBOL IL1 IL1T IL0 ICC1 80 MI N TYP MAX 1.0 50 1.0 120 UNITS A A A mA
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3. Maximum Icc current specifications are tested with Vcc=Vcc max
HMF51232M4S
ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Sector Erase Time Chip Erase Time Byte Programming Time Chip Programming Time Notes: 1. Typical program and erase times assume the follwing conditions:25,5.0Vcc,1,000,000cycles. Additionally,programming typicals assume checkerboard pattern. 2. 3. Under worst case conditions of 90C, Vcc=4.5V(4.75V for-55), 1,000,000 cycles. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then does the device set DQ5= 1. See the section os DQ5for further information. 4. 5. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 4 for further in formation on command definitions. 6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000cycles. TYP. 1 8 7 3.6 MAX. 8 64 300 10.8 sec sec us sec Excludes 00H programming prior to erasure Excludes system-level overhead UNIT COMMENTS
CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER TEST SETUP DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance
o
TYP. 6 8.5 7.5
MAX 7.5 12 9
UNIT pF pF pF
VIN = 0 VOUT = 0 VIN = 0
Notes : Test conditions TA = 25 C, f=1.0 MHz.
TEST CONDITIONS
TEST CONDITION Output load Output load Capacitance, CL Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels 30 5 0~3 1.5 -55 1 TTL gate 100 20 0.45~2.4 0.8 pF ns V V ALL OTHERS UNIT
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Output timing measurement reference levels 1.5 2.0
HMF51232M4S
V
AC CHARACTERISTICS u Read Only Operations Characteristics
PARAMETE TEST R SYMBOLS tRC tACC Address to Output Delay /OE = VIL tCE tOE tDF tDF Chip Enable to Output Delay Chip Enable to Output Delay Chip Enable to Output High-Z Output Enable to Output High-Z Output Hold Time From Addresses, tQH /CE or /OE, Whichever Occurs First 0 0 0 ns 0 18 0 /OE = VIL 55 30 0 20 70 30 0 20 90 35 0 35 120 50 ns ns ns ns Read Cycle Time /CE = VIL 55 55 70 70 90 120 ns 90 120 ns DESCRIPTION SETUP MIN MAX MIN MAX MIN MAX MIN MAX -55 -70 -90 -120 UNIT
5.0V
2.7k Device Under Test CL IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
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u Erase/Program Operations
PARAMETER SYMBOLS tWC tAS tAH tDS tDH tOES tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVCS Notes : 1. This does not include the preprogramming time 2. This timing is only for Sector Protect operations DESCRIPTION MIN Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Byte Programming Operation Sector Erase Operation (Note1) Vcc set up time 30 35 20 7 1 50 40 25 45 30 0 0 0 0 0 45 55 TYP MIN 70 0 45 45 MAX MIN 90 -55 -70 -90
HMF51232M4S
-120 UNIT MAX MIN 120 MAX ns ns 50 50 ns ns ns ns ns ns ns 50 ns ns s sec s
u Erase/Program Operations Alternate /CE Controlled Writes
PARAMETER SYMBOLS tWC tAS tAH tDS tDH tGHEL tWS tWH tCP tCPH tWHWH1 DESCRIPTION MIN Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Read Recover Time Before Write /WE Setup Time /WE Hold Time /CE Pulse Width /CE Pulse Width High Byte Programming Operation 30 ns 35 20 7 40 25 ns ns 45 30 0 0 0 0 45 50 55 TYP ns MIN 70 0 45 45 50 50 MAX MIN 90 MAX MIN 120 MAX ns ns ns ns ns ns ns ns ns ns s -55 -70 -90 -120 UNIT
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tWHWH2 Sector Erase Operation (Note) 1
HMF51232M4S
sec
Notes : This does not include the preprogramming time.
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u READ OPERATIONS TIMING
HMF51232M4S
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF51232M4S
u CHIP/SECTOR ERASE OPERATION TIMINGS
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u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
HMF51232M4S
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF51232M4S
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMENSIONS
HMF51232M4S
0.25 mm MAX
2.54 mm MIN Gold: 1.040.10 mm Solder: 0.9140.10 mm 1.270.08mm
1.27
(Solder & Gold Plating)
ODERING INFORMATION
Part Number Density Org. Package Component Number 4EA 4EA 4EA 4EA Vcc SPEED
HMF51232M4S-55 HMF51232M4S-70 HMF51232M4S-90 HMF51232M4S-120
2MByte 2MByte 2MByte 2MByte
512Kx32bit 512Kx32bit 512Kx32bit 512Kx32bit
72 Pin-SIMM 72 Pin-SIMM 72 Pin-SIMM 72 Pin-SIMM
5.0V 5.0V 5.0V 5.0V
55ns 70ns 90ns 120ns
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